1. Field of the Invention
The present invention relates to a device for supplying control signals to memory units of a memory module, and, in particular, to a device which is suitable for supplying command/address signals to memory chips arranged on a memory module. In addition, the present invention relates to a memory unit adapted to such a device, in particular a memory unit which is used as memory chip of a memory module.
2. Description of the Related Art
Conventional memory modules consist of a plurality of memory chips which are arranged on a common board and which form a memory module. For accessing the individual memory chips, command/address buses and data buses are provided in addition to suitable clock lines. Conventional DRAM memory modules (DRAM=Dynamic Random Access Memory), for example, have such a configuration. Both data signals and control signals are supplied to the memory module making use of an external memory control, the so-called chipset.
In a memory module configuration of the above-mentioned type, the data rate on the command/address bus is limited due to the high input capacitance of the DRAM memory chips, the buses leading to the DRAM memory chips having great line lengths so that a separate register/buffer chip is necessary for accessing the DRAM memory chips via the command/address bus. It follows that in existing memory architectures an extra register is necessary for driving the command/address bus. The problems referred to especially arise, to a greater degree, in the case of memory modules with high access rates and access frequencies, e.g. DDR memory modules (DDR=Double Data Rate), which are normally constructed as DIMM architecture (DIMM=Dual In-line Memory Module).
In order to solve the above-mentioned problem, it has hitherto been common practice to use more than one command/address bus copy on the mother board level. For an un-buffered DDR333 two-slot system, one C/A bus copy per slot (mounting location) can, for example, be used for a total number of two C/A bus copies (C/A=Command/Address). Alternatively, two copies of command/address buses (C/A buses) were used in the memory module comprising separate memory registers or one memory register with divided outputs for solving the above problem.